1. Field
This disclosure relates generally to phase locked loops, and more specifically, to phase locked loops with power supply control.
2. Related Art
Phase locked loops (PLLs) are very important for controlling clock frequency which is a significant consideration for processors and other circuits operating at high frequencies. PLLs present an inherent difficulty in they are mostly analog in operation in an environment that has mostly logic circuits. Thus semiconductor manufacturing processes that may be optimized for logic circuits may not be optimum for analog applications. In the case of PLLs controlling the clock for a system that is mostly logic circuits, the manufacturing process being used is typically optimized for logic circuits. Thus, the PLL is likely to be made by a logic manufacturing process rather than an analog manufacturing process. This is further compounded by the continuing shrinking of critical dimensions and power supply voltage. The reduction in power supply voltage, which may be necessitated by the dimension shrinkage, does not generally benefit analog operation.
Accordingly, there is a need for addressing the concerns addressed above in the context of a PLL and a digital circuit on the same integrated circuit.